%FILES%
opt/
opt/intelFPGA/
opt/intelFPGA/24.1/
opt/intelFPGA/24.1/quartus/
opt/intelFPGA/24.1/quartus/common/
opt/intelFPGA/24.1/quartus/common/devinfo/
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_arm_meab.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_common_block.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cuda_clkbuf.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cuda_dsp.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cuda_io.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cuda_lab.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cuda_le.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cuda_pll.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneii_dsp_ape.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneiii_ram.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-6_1200mv_0c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-6_1200mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-6_1200mv_85c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-6_1200mv_85c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_0c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_100c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_100c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_125c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_125c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_85c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_85c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_n40c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1200mv_n40c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_0c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_100c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_100c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_125c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_125c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_85c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_85c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_n40c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-7_1_1200mv_n40c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-8_1200mv_0c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-8_1200mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-8_1200mv_85c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-8_1200mv_85c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-8l_1000mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-8l_1000mv_100c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-8l_1000mv_85c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-8l_1000mv_n40c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-9l_1000mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-9l_1000mv_85c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-m_1000mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-m_1000mv_n40c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-m_1200mv_0c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-m_1200mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-m_1200mv_n40c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive-m_1200mv_n40c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive.ref
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-7_1_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8l_1000mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8l_1000mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8l_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-8l_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-9l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-9l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-9l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-9l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-m_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-m_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-m_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-m_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1e144c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1e144c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1e144i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1f256c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1f256c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1f256i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1fbga256_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1fbga256td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1tqfp144_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1tqfp144td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1_v1ufbga256_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1e144c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1e144c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1e144i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1f256c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1f256c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1f256i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1fbga256_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1fbga256td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1tqfp144_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1tqfp144td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive1ufbga256_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-7_1_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8l_1000mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8l_1000mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8l_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-8l_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-9l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-9l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-9l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-9l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-m_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-m_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-m_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-m_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-7_1_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8l_1000mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8l_1000mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8l_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-8l_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-9l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-9l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-9l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-9l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-m_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-m_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-m_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-m_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5e144c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5e144c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5e144i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5f256c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5f256c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5f256i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5fbga256_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5fbga256td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5tqfp144_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5tqfp144td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_5ufbga256_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2e144c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2e144c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2e144i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2f256c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2f256c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2f256i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2f484c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2f484c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2f484i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2fbga256_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2fbga256td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2fbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2fbga484td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2mbga164_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2mbga256_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2tqfp144_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2tqfp144td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2u484c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2ufbga256_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive2ufbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-7_1_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8l_1000mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8l_1000mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8l_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-8l_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-9l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-9l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-9l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-9l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-m_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-m_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-m_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-m_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1f484c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1f484c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1f484i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1f780c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1f780c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1f780i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1fbga324_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1fbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1fbga484td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1fbga780_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1fbga780td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3_v1ufbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3f484c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3f484c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3f484i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3f780c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3f780c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3f780i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3fbga324_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3fbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3fbga484td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3fbga780_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3fbga780td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive3ufbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-7_1_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8l_1000mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8l_1000mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8l_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-8l_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-9l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-9l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-9l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-9l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-m_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-m_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-m_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-m_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4f484c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4f484c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4f484i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4f780c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4f780c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4f780i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4fbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4fbga484td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4fbga780_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4fbga780td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive4ufbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8l_1000mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8l_1000mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8l_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-8l_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-9l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-9l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-9l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-9l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-m_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-m_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-m_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-m_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5f484c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5f484c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5f484i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5f780c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5f780c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5f780i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5fbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5fbga484td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5fbga780_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5fbga780td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive5ufbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8l_1000mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8l_1000mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8l_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-8l_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-9l_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-9l_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-9l_1000mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-9l_1000mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-m_1000mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-m_1000mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-m_1000mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-m_1000mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6f484c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6f484c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6f484i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6f780c8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6f780c9l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6f780i8l_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6fbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6fbga484td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6fbga780_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive6fbga780td_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ff_1000mv_0c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ff_1000mv_n40c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ff_1000mv_n55c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ff_1200mv_0c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ff_1200mv_n40c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ff_1200mv_n55c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1000mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1000mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1000mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1000mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1000mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1000mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ii_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1000mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1000mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1000mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1000mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1000mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1000mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_ss_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1000mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1000mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1000mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1000mv_85c_nom.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1000mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1000mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1000mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1200mv_85c_nom.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_31um_tt_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ff_1000mv_0c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ff_1000mv_n40c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ff_1000mv_n55c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ff_1200mv_0c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ff_1200mv_n40c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ff_1200mv_n55c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1000mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1000mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1000mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1000mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1000mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1000mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ii_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1000mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1000mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1000mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1000mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1000mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1000mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_ss_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1000mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1000mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1000mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1000mv_85c_nom.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1000mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1000mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1000mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1200mv_85c_nom.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_aiot_45um_tt_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_bandwidth.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_basic.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_blkrba.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_info_counts.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ff_1000mv_0c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ff_1000mv_n40c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ff_1000mv_n55c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ff_1200mv_n40c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ff_1200mv_n55c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ii_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ii_1200mv_100c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ii_1200mv_125c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ii_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ii_1200mv_n40c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ii_1200mv_n55c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ss_1000mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ss_1000mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_tt_1000mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_tt_1000mv_85c_nom.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_tt_1000mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_tt_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_tt_1200mv_85c_nom.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.31um_tt_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ff_1000mv_0c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ff_1000mv_n40c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ff_1000mv_n55c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ff_1200mv_n40c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ff_1200mv_n55c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ii_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ii_1200mv_100c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ii_1200mv_125c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ii_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ii_1200mv_n40c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ii_1200mv_n55c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ss_1000mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ss_1000mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_tt_1000mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_tt_1000mv_85c_nom.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_tt_1000mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_tt_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_tt_1200mv_85c_nom.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_io_sim_cache.45um_tt_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_circuits.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ff_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ff_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ff_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ii_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ii_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ii_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ii_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ii_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ii_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ss_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ss_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ss_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ss_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ss_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_ss_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_tt_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_tt_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_tt_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_tt_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_tt_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_31um_tt_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_circuits.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ff_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ff_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ff_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ii_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ii_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ii_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ii_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ii_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ii_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ss_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ss_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ss_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ss_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ss_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_ss_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_tt_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_tt_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_tt_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_tt_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_tt_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_45um_tt_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda1f17.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda2f17.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda2f23.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda2m8.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda2u19.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda3f17.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda4f19.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda4f23.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda4f29.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda4u19.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda5f23.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda5f29.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda6f23.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda6f29.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda7f23.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_jspice_packages_cuda7f29.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_lei.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_mtbf_constants.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_mtbf_constants_1000mv.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_pwr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_cycloneive_rsi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_titan_io_group.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_yeager_global_routing.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_yeager_local_routing.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_yeager_ncfg.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_yeager_periph_blocks.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneive/ddb_yeager_pll_block.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_arm_meab.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_common_block.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_cycloneii_dsp_ape.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-6_1200mv_0c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-6_1200mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-6_1200mv_85c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-6_1200mv_85c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-7_1200mv_0c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-7_1200mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-7_1200mv_100c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-7_1200mv_100c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-7_1200mv_125c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-7_1200mv_85c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-7_1200mv_85c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-7_1200mv_n40c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-7_1200mv_n40c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-8_1200mv_0c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-8_1200mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-8_1200mv_85c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-8_1200mv_85c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-m_1200mv_0c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-m_1200mv_0c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-m_1200mv_n40c_nlspccache.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray-m_1200mv_n40c_nlspcdata.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray.ref
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1fbga169_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray1qfn148_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_v1.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2_v1_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2fbga169_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray2fbga324_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_v1.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_v1_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_v2.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3_v2_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3fbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3fbga6722h_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray3fbga672_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-6_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-6_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-6_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-6_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_100c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_100c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_125c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_125c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-7_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-8_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-8_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-8_1200mv_85c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-8_1200mv_85c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-m_1200mv_0c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-m_1200mv_0c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-m_1200mv_n40c.dmf.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4-m_1200mv_n40c_fdi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_asm.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_asmdb.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_asmdb_dirt.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_gid_database.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_icname.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_place.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_routing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_timing.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_v1.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4_v1_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4fbga484_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4fbga6722h_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4fbga672_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4fbga8962h_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray4fbga896_pkg.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ff_1200mv_0c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ff_1200mv_n40c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ff_1200mv_n55c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ii_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ii_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ii_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ii_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ii_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ii_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ss_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ss_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ss_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ss_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ss_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_ss_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_tt_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_tt_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_tt_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_tt_1200mv_85c_nom.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_tt_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_tt_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_45um_tt_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ff_1200mv_0c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ff_1200mv_n40c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ff_1200mv_n55c_fast.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ii_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ii_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ii_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ii_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ii_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ii_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ss_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ss_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ss_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ss_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ss_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_ss_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_tt_1200mv_0c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_tt_1200mv_100c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_tt_1200mv_125c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_tt_1200mv_85c_nom.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_tt_1200mv_85c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_tt_1200mv_n40c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_aiot_99um_tt_1200mv_n55c_slow.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_bandwidth_gpll.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_bandwidth_mpll.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_basic.pll
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_blkrba.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_clkbuf.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_dsp.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_hdr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_info_counts.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_group.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ff_1200mv_n40c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ff_1200mv_n55c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ii_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ii_1200mv_100c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ii_1200mv_125c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ii_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ii_1200mv_n40c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ii_1200mv_n55c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_tt_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_tt_1200mv_85c_nom.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.45um_tt_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ff_1200mv_n40c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ff_1200mv_n55c_fast.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ii_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ii_1200mv_100c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ii_1200mv_125c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ii_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ii_1200mv_n40c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ii_1200mv_n55c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ss_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_ss_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_tt_1200mv_85c_nom.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_circuits.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ff_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ff_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ff_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ii_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ii_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ii_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ii_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ii_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ii_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ss_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ss_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ss_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ss_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ss_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_ss_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_tt_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_tt_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_tt_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_tt_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_tt_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_45um_tt_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_circuits.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ff_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ff_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ff_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ii_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ii_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ii_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ii_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ii_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ii_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ss_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ss_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ss_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ss_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ss_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_ss_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_tt_0c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_tt_100c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_tt_125c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_tt_85c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_tt_n40c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_99um_tt_n55c.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_packages_stingray1fbga169.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_packages_stingray2fbga169.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_packages_stingray2fbga324.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_packages_stingray3fbga484.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_packages_stingray3fbga672.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_packages_stingray4fbga484.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_packages_stingray4fbga672.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_jspice_packages_stingray4fbga896.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_lab.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_le.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_lei.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_mtbf_constants.sin
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_pad.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_part_info.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_pll.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_pwr.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_quad.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_quad_channel.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_quad_cmu.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_ram.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_stingray_rsi.ddb
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_yeager_global_routing.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_yeager_local_routing.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_yeager_ncfg.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_yeager_periph_blocks.dxf
opt/intelFPGA/24.1/quartus/common/devinfo/cycloneivgx/ddb_yeager_pll_block.dxf
